.
|-- Android.bp
|-- backend
| |-- Backend.cpp
| |-- Backend.h
| |-- BackendClient.cpp
| |-- BackendClient.h
| |-- BackendManager.cpp
| `-- BackendManager.h
|-- bufferinfo
| |-- BufferInfo.h
| |-- BufferInfoGetter.cpp
| |-- BufferInfoGetter.h
| |-- BufferInfoMapperMetadata.cpp
| `-- BufferInfoMapperMetadata.h
|-- compositor
| |-- DrmKmsPlan.cpp
| |-- DrmKmsPlan.h
| |-- FlatteningController.cpp
| |-- FlatteningController.h
| `-- LayerData.h
|-- drm
| |-- DrmAtomicStateManager.cpp
| |-- DrmAtomicStateManager.h
| |-- DrmConnector.cpp
| |-- DrmConnector.h
| |-- DrmCrtc.cpp
| |-- DrmCrtc.h
| |-- DrmDevice.cpp
| |-- DrmDevice.h
| |-- DrmDisplayPipeline.cpp
| |-- DrmDisplayPipeline.h
| |-- DrmEncoder.cpp
| |-- DrmEncoder.h
| |-- DrmFbImporter.cpp
| |-- DrmFbImporter.h
| |-- DrmMode.cpp
| |-- DrmMode.h
| |-- DrmPlane.cpp
| |-- DrmPlane.h
| |-- DrmProperty.cpp
| |-- DrmProperty.h
| |-- DrmUnique.h
| |-- ResourceManager.cpp
| |-- ResourceManager.h
| |-- UEventListener.cpp
| |-- UEventListener.h
| |-- VSyncWorker.cpp
| `-- VSyncWorker.h
|-- hwc2_device
| |-- DrmHwcTwo.cpp
| |-- DrmHwcTwo.h
| |-- HwcDisplay.cpp
| |-- HwcDisplay.h
| |-- HwcDisplayConfigs.cpp
| |-- HwcDisplayConfigs.h
| |-- HwcLayer.cpp
| |-- HwcLayer.h
| `-- hwc2_device.cpp
`-- utils
|-- UEvent.h
|-- fd.cpp
|-- fd.h
|-- log.h
`-- properties.h
std::map<hwc2_layer_t, HwcLayer> layers_;
map数组,把SF的layer 与 HWC layer 一一映射,用于对应用图层和合成图层进行管理,看定义 hwc2_layer_t 就是一个 uint64_t的数值typedef uint64_t hwc2_layer_t;
HwcLayer client_layer_;
专用于GPU合成的特殊图层 HWC layerHWC2::Error HwcDisplay::CreateLayer(hwc2_layer_t *layer { layers_.emplace(static_cast<hwc2_layer_t>(layer_idx_, HwcLayer(this; *layer = static_cast<hwc2_layer_t>(layer_idx_; ++layer_idx_; return HWC2::Error::None; } HWC2::Error HwcDisplay::DestroyLayer(hwc2_layer_t layer { if (!get_layer(layer { return HWC2::Error::BadLayer; } layers_.erase(layer; return HWC2::Error::None; }
Backend::HardwareSupportsLayerType 判断是否是硬件支持的合成类型,这里应根据硬件能力适配调整
bool Backend::HardwareSupportsLayerType(HWC2::Composition comp_type { return comp_type == HWC2::Composition::Device || comp_type == HWC2::Composition::Cursor; }
bi_get_failed_ get buffer information failed or not
fb_import_failed_ import frame buffer failed or not
buffer_handle_ layer通过SetLayerBuffer设置下来的buffer handle
ResourceManager::Init( 初始化时有几个属性值
"vendor.hwc.drm.scale_with_gpu" ==> 比例缩放是否由GPU做
enum class CtmHandling { kDrmOrGpu, /* Handled by DRM is possible, otherwise by GPU */ kDrmOrIgnore, /* Handled by DRM is possible, otherwise displayed as is */ };
那么一个
Layer
的合成方式是怎么确定的那?大致流程如下所示:当VSync信号到来时,SurfaceFlinger被唤醒,处理Layer的新建,销毁和更新,并且为相应Layer设置期望的合成方式。
- 所有Layer更新后,SurfaceFlinger调用
validateDisplay
,让HWC决定每个Layer的合成方式。- SurfaceFlinger调用
getChangedCompositionTypes
检查HWC是否对任何Layer的合成方式做出了改变,若是,那么SurfaceFlinger则调整对应Layer的合成方式,并且调用acceptDisplayChanges
通知HWC。- SurfaceFlinger把所有
Client
类型的Layer合成到Target图形缓冲区,然后调用setClientTarget
把Target Buffer设置给HWC。(如果没有Client类型的Layer,则可以跳过该方法)- 最后,SurfaceFlinger调用
presentDisplay
,让HWC完成剩余Layer的合成,并且在显示屏上展示出最终的合成结果。
switch (layer_data_.bi->format { ALOGD("format 0x%08x\n", layer_data_.bi->format; case DRM_FORMAT_C8: ALOGD("DRM_FORMAT_C8";break; case DRM_FORMAT_NV12: ALOGD("DRM_FORMAT_NV12";break; case DRM_FORMAT_NV21: ALOGD("DRM_FORMAT_NV21";break; case DRM_FORMAT_NV16: ALOGD("DRM_FORMAT_NV16";break; case DRM_FORMAT_NV61: ALOGD("DRM_FORMAT_NV61";break; case DRM_FORMAT_YUV420: ALOGD("DRM_FORMAT_YUV420";break; case DRM_FORMAT_YVU420: ALOGD("DRM_FORMAT_YVU420";break; case DRM_FORMAT_ARGB4444: ALOGD("DRM_FORMAT_ARGB4444";break; case DRM_FORMAT_XRGB4444: ALOGD("DRM_FORMAT_XRGB4444";break; case DRM_FORMAT_ABGR4444: ALOGD("DRM_FORMAT_ABGR4444";break; case DRM_FORMAT_XBGR4444: ALOGD("DRM_FORMAT_XBGR4444";break; case DRM_FORMAT_RGBA4444: ALOGD("DRM_FORMAT_RGBA4444";break; case DRM_FORMAT_RGBX4444: ALOGD("DRM_FORMAT_RGBX4444";break; case DRM_FORMAT_BGRA4444: ALOGD("DRM_FORMAT_BGRA4444";break; case DRM_FORMAT_BGRX4444: ALOGD("DRM_FORMAT_BGRX4444";break; case DRM_FORMAT_ARGB1555: ALOGD("DRM_FORMAT_ARGB1555";break; case DRM_FORMAT_XRGB1555: ALOGD("DRM_FORMAT_XRGB1555";break; case DRM_FORMAT_ABGR1555: ALOGD("DRM_FORMAT_ABGR1555";break; case DRM_FORMAT_XBGR1555: ALOGD("DRM_FORMAT_XBGR1555";break; case DRM_FORMAT_RGBA5551: ALOGD("DRM_FORMAT_RGBA5551";break; case DRM_FORMAT_RGBX5551: ALOGD("DRM_FORMAT_RGBX5551";break; case DRM_FORMAT_BGRA5551: ALOGD("DRM_FORMAT_BGRA5551";break; case DRM_FORMAT_BGRX5551: ALOGD("DRM_FORMAT_BGRX5551";break; case DRM_FORMAT_RGB565: ALOGD("DRM_FORMAT_RGB565";break; case DRM_FORMAT_BGR565: ALOGD("DRM_FORMAT_BGR565";break; case DRM_FORMAT_UYVY: ALOGD("DRM_FORMAT_UYVY";break; case DRM_FORMAT_VYUY: ALOGD("DRM_FORMAT_VYUY";break; case DRM_FORMAT_YUYV: ALOGD("DRM_FORMAT_YUYV";break; case DRM_FORMAT_YVYU: ALOGD("DRM_FORMAT_YVYU";break; case DRM_FORMAT_BGR888: ALOGD("DRM_FORMAT_BGR888";break; case DRM_FORMAT_RGB888: ALOGD("DRM_FORMAT_RGB888";break; case DRM_FORMAT_ARGB8888: ALOGD("DRM_FORMAT_ARGB8888";break; case DRM_FORMAT_XRGB8888: ALOGD("DRM_FORMAT_XRGB8888";break; case DRM_FORMAT_ABGR8888: ALOGD("DRM_FORMAT_ABGR8888";break; case DRM_FORMAT_XBGR8888: ALOGD("DRM_FORMAT_XBGR8888";break; case DRM_FORMAT_RGBA8888: ALOGD("DRM_FORMAT_RGBA8888";break; case DRM_FORMAT_RGBX8888: ALOGD("DRM_FORMAT_RGBX8888";break; case DRM_FORMAT_BGRA8888: ALOGD("DRM_FORMAT_BGRA8888";break; case DRM_FORMAT_BGRX8888: ALOGD("DRM_FORMAT_BGRX8888";break; case DRM_FORMAT_ARGB2101010: ALOGD("DRM_FORMAT_ARGB2101010";break; case DRM_FORMAT_XRGB2101010: ALOGD("DRM_FORMAT_XRGB2101010";break; case DRM_FORMAT_ABGR2101010: ALOGD("DRM_FORMAT_ABGR2101010";break; case DRM_FORMAT_XBGR2101010: ALOGD("DRM_FORMAT_XBGR2101010";break; case DRM_FORMAT_RGBA1010102: ALOGD("DRM_FORMAT_RGBA1010102";break; case DRM_FORMAT_RGBX1010102: ALOGD("DRM_FORMAT_RGBX1010102";break; case DRM_FORMAT_BGRA1010102: ALOGD("DRM_FORMAT_BGRA1010102";break; case DRM_FORMAT_BGRX1010102: ALOGD("DRM_FORMAT_BGRX1010102";break; case DRM_FORMAT_XRGB16161616F: ALOGD("DRM_FORMAT_XRGB16161616F";break; case DRM_FORMAT_XBGR16161616F: ALOGD("DRM_FORMAT_XBGR16161616F";break; case DRM_FORMAT_ARGB16161616F: ALOGD("DRM_FORMAT_ARGB16161616F";break; case DRM_FORMAT_ABGR16161616F: ALOGD("DRM_FORMAT_ABGR16161616F";break; default: break; }
02-14 18:41:17.833 22358 22358 D drm_render: yuv-YV12 address: y = 0xecc16000, cr = 0xece32000, cb = 0xeceb9000 02-14 18:41:17.833 22358 22358 D drm_render: yuv-YV12 address offset: cr-b=2211840, cb-y =2764800 02-14 18:41:17.833 22358 22358 D drm_render: yuv-YV12 ystride = 2048, cstride = 1024 02-14 18:41:17.994 22358 22358 D drm_render: buffer_handle_t ==> i=0, fd=9 02-14 18:41:17.994 22358 22358 D drm_render: buffer_handle_t ==> i=1, fd=10 02-14 18:41:17.994 22358 22358 D drm_render: width=1920, height=1080, format=842094169, hal_format=842094169, usage=4912 02-14 18:41:17.995 22358 22358 D drm_render: pitches[0]=2048, offsets[0]=0, gem_handles[0]=1, prime_fds[0]=9 02-14 18:41:17.995 22358 22358 D drm_render: pitches[1]=1024, offsets[1]=2211840, gem_handles[1]=1, prime_fds[1]=9 02-14 18:41:17.995 22358 22358 D drm_render: pitches[2]=1024, offsets[2]=2764800, gem_handles[2]=1, prime_fds[2]=9 02-14 18:41:17.995 22358 22358 D drm_render: pitches[3]=0, offsets[3]=0, gem_handles[3]=0, prime_fds[3]=0 02-14 18:41:20.832 22371 22371 D drm_render: yuv-NV12 address: y = 0xed048000, cr = 0xed242401, cb = 0xed242400 02-14 18:41:20.832 22371 22371 D drm_render: yuv-NV12 address offset: cr-b=2073601, cb-y =2073600 02-14 18:41:20.832 22371 22371 D drm_render: yuv-NV12 ystride = 1920, cstride = 1920 02-14 18:41:20.994 22371 22371 D drm_render: buffer_handle_t ==> i=0, fd=9 02-14 18:41:20.995 22371 22371 D drm_render: buffer_handle_t ==> i=1, fd=10 02-14 18:41:20.995 22371 22371 D drm_render: width=1920, height=1080, format=842094158, hal_format=114, usage=4912 02-14 18:41:20.995 22371 22371 D drm_render: pitches[0]=1920, offsets[0]=0, gem_handles[0]=1, prime_fds[0]=9 02-14 18:41:20.995 22371 22371 D drm_render: pitches[1]=1920, offsets[1]=2073600, gem_handles[1]=1, prime_fds[1]=9 02-14 18:41:20.995 22371 22371 D drm_render: pitches[2]=0, offsets[2]=0, gem_handles[2]=1, prime_fds[2]=9 02-14 18:41:20.995 22371 22371 D drm_render: pitches[3]=0, offsets[3]=0, gem_handles[3]=0, prime_fds[3]=0
--
uevent_listener_ = UEventListener::CreateInstance(;
UEventListener是如何检测及处理hotplug事件的?uevent_listener_->RegisterHotplugHandler([this] { const std::unique_lock lock(GetMainLock(; UpdateFrontendDisplays(; };
Drmhwc2Device 有一个成员 DrmHwcTwo drmhwctwo;
DrmHwcTwo 有一个成员 ResourceManager resource_manager_;
ResourceManager 有一个成员 std::vector<std::unique_ptr<DrmDevice>> drms_; 这是一个数组
DrmDevice 有一系列成员,代表DRM相关的资源
std::vector<std::unique_ptr<DrmConnector>> connectors_; std::vector<std::unique_ptr<DrmConnector>> writeback_connectors_; std::vector<std::unique_ptr<DrmEncoder>> encoders_; std::vector<std::unique_ptr<DrmCrtc>> crtcs_; std::vector<std::unique_ptr<DrmPlane>> planes_;
DrmDevice 有一个成员 std::unique_ptr<DrmFbImporter> drm_fb_importer_;
Encoders: id crtc type possible crtcs possible clones 38 35 TMDS 0x00000001 0x00000000 Connectors: id encoder status name size (mm modes encoders 39 38 connected HDMI-A-1 530x300 9 38 modes: index name refresh (Hz hdisp hss hse htot vdisp vss vse vtot #0 1920x1080 60.00 1920 2008 2052 2200 1080 1084 1089 1125 148500 flags: phsync, pvsync; type: preferred, driver #1 1920x1080 59.94 1920 2008 2052 2200 1080 1084 1089 1125 148352 flags: phsync, pvsync; type: driver #2 1920x1080 50.00 1920 2448 2492 2640 1080 1084 1089 1125 148500 flags: phsync, pvsync; type: driver #3 1280x720 60.00 1280 1390 1430 1650 720 725 730 750 74250 flags: phsync, pvsync; type: driver #4 1280x720 59.94 1280 1390 1430 1650 720 725 730 750 74176 flags: phsync, pvsync; type: driver #5 1280x720 50.00 1280 1720 1760 1980 720 725 730 750 74250 flags: phsync, pvsync; type: driver #6 720x576 50.00 720 732 796 864 576 581 586 625 27000 flags: nhsync, nvsync; type: driver #7 720x480 60.00 720 736 798 858 480 489 495 525 27027 flags: nhsync, nvsync; type: driver #8 720x480 59.94 720 736 798 858 480 489 495 525 27000 flags: nhsync, nvsync; type: driver props: 1 EDID: flags: immutable blob blobs: value: 00ffffffffffff00410c100001010101 0019010380351e782a4789a357479f22 11484cbfef80b300950081808140714f 010101010101023a801871382d40582c 450009252100001e662150b051001b30 4070360009252100001e000000fd0037 4c1e5211000a202020202020000000fc 003234504646333535352f54330a016c 020322f24f9f14131211161590050403 02070601230907018301000065030c00 1000023a80d072382d40102c45800925 2100001e011d80d0721c1620102c2500 09252100009e011d00bc52d01e20b828 55400925210000188c0ad09020403120 0c405500092521000018023a80187138 2d40582c450009252100001e00000026 2 DPMS: flags: enum enums: On=0 Standby=1 Suspend=2 Off=3 value: 0 5 link-status: flags: enum enums: Good=0 Bad=1 value: 0 6 non-desktop: flags: immutable range values: 0 1 value: 0 4 TILE: flags: immutable blob blobs: value: 40 RGB or YCbCr: flags: enum enums: RGB=0 Y422=1 Y444=2 Y420=3 value: 0 41 HDR mode: flags: enum enums: AUTO=0 DV_ON=1 SDR=2 HDR_GAMMA=3 PQHDR=4 FUTURE=5 INPUT=6 DV_LL_12b_Y422=7 DV_LL_10b_Y444=8 DV_LL_10b_RGB=9 DV_LL_12b_Y444=10 DV_LL_12b_RGB=11 DV_ON_INPUT=12 DV_LL_12b422_INPUT=13 INPUT_BT2020=14 value: 2 42 fractional fps: flags: enum enums: Disable=0 Enable=1 value: 0 43 allm: flags: enum enums: Unsupported=0 Disable=1 Enable=2 value: 0 44 qms_vrr: flags: enum enums: Unsupported=255 Disable=0 Enable_VRR=1 Enable_QMS=2 value: 255 45 vrr_rate: flags: enum enums: UNSPECIFIED=255 RATE_23HZ=9 RATE_24HZ=3 RATE_25HZ=8 RATE_29HZ=7 RATE_30HZ=6 RATE_47HZ=5 RATE_48HZ=2 RATE_50HZ=1 RATE_59HZ=4 RATE_60HZ=0 RATE_BASE=254 value: 255 46 max bpc: flags: range values: 8 12 value: 0 47 Content Protection: flags: enum enums: Undesired=0 Desired=1 Enabled=2 value: 0 48 HDCP Content Type: flags: enum enums: HDCP Type0=0 HDCP Type1=1 value: 0 49 hdcp14_timout: flags: range values: 0 300 value: 5 CRTCs: id fb pos size 35 51 (0,0 (1920x1080 #0 1920x1080 60.00 1920 2008 2052 2200 1080 1084 1089 1125 148500 flags: phsync, pvsync; type: preferred, driver props: 24 VRR_ENABLED: flags: range values: 0 1 value: 0 Planes: id crtc fb CRTC x,y x,y gamma size possible crtcs 31 35 53 0,0 0,0 0 0x00000001 formats: XR24 AR24 RG16 RG24 BG24 UYVY YUYV YU16 YU12 YV12 NV12 NV21 props: 8 type: flags: immutable enum enums: Overlay=0 Primary=1 Cursor=2 value: 1 30 IN_FORMATS: flags: immutable blob blobs: value: 01000000000000000c00000018000000 00000000480000005852323441523234 52473136524732344247323455595659 59555956595531365955313259563132 4e5631324e563231 in_formats blob decoded: XR24: AR24: RG16: RG24: BG24: UYVY: YUYV: YU16: YU12: YV12: NV12: NV21: 33 0 0 0,0 0,0 0 0x00000001 formats: XR24 AR24 RG16 RG24 BG24 UYVY YUYV YU16 YU12 YV12 NV12 NV21 props: 8 type: flags: immutable enum enums: Overlay=0 Primary=1 Cursor=2 value: 2 30 IN_FORMATS: flags: immutable blob blobs: value: 01000000000000000c00000018000000 00000000480000005852323441523234 52473136524732344247323455595659 59555956595531365955313259563132 4e5631324e563231 in_formats blob decoded: XR24: AR24: RG16: RG24: BG24: UYVY: YUYV: YU16: YU12: YV12: NV12: NV21: 36 0 0 0,0 0,0 0 0x00000001 formats: XR24 AR24 RG16 RG24 BG24 UYVY YUYV YU16 YU12 YV12 NV12 NV21 props: 8 type: flags: immutable enum enums: Overlay=0 Primary=1 Cursor=2 value: 0 30 IN_FORMATS: flags: immutable blob blobs: value: 01000000000000000c00000018000000 00000000480000005852323441523234 52473136524732344247323455595659 59555956595531365955313259563132 4e5631324e563231 in_formats blob decoded: XR24: AR24: RG16: RG24: BG24: UYVY: YUYV: YU16: YU12: YV12: NV12: NV21: Frame buffers: id size pitch